CMOS Processes
austriamicrosystems´ 0.35µm CMOS process family has been transferred from TSMC and is fully compatible with TSMC 0.35µm mixed signal process.
The high density CMOS standard cell library optimized for synthesis and 3- and 4-layer routing guarantees high gate densities. Peripheral cell libraries are available for 3.3V and 5V with high driving capabilities and excellent ESD performance. Qualified digital macro blocks (RAM, diffusion programmable ROM and DPRAM) are available on request.
- 0.35µm Technology Selection Guide
- 0.35µm CMOS Application Notes
- 0.8µm Technology Selection Guide
- 0.8µm CMOS Application Notes