Compact MOS Transistor Modeling
austriamicrosystems supports highly accurate compact MOS transistor models for analog/mixed signal applications.
Industry standard device models like BSIM3V3 or BSIM4 are used to create scalable transistor models valid in any range of operation.
MOS transistor models fulfill all requirements concerning continuity, accuracy and scalability of the DC and AC behaviour of the device.
The SPICE parameter extraction focuses on analog applications and is based on accurate gm, gds, gmb and gate-capacitance modeling.
The following physical effects are modeled:
- Channel length modulation
- Mobility reduction due to the vertical field
- Temperature behaviour from -40 -150deg C
- 1/f noise and white noise
- Non-uniform doping
- Short- and narrow-channel effects on treshold voltage
- Drain-induced barrier lowering
- Bulk charge effect
- Drain-induced barrier lowering (DIBL)
- Substrate current-induced body effect (SCBE)
- Source/drain parasitic resistance
Process corner models as well as Monte Carlo models are provided for MOS transistors to enable robust design of both analog and digital applications. The MOS transistor models provided by austriamicrosystems are supported and qualified for a range of circuit simulators (Spectre, ELDO, HSPICE, ADS, SMARTSPICE, SABER, PSPICE and SMASH).
All circuit simulation models can be downloaded from the austriamicrosystems Support Information Center - download area.