High Voltage Modeling

Special subcircuit extensions of the industry standard BSIM3v3 MOS model are used to address the unique behaviour of high voltage MOS devices in 50V and 90V SVX processes.
In this way an accurate RON, GM & GDS modelling - essential for analogue design - can be provided for all operating regions and geometries. The device models are scalable and implemented for a variety of circuit simulators (Spectre, ELDO, HSPICE, ADS, SMARTSPICE, SABER, PSPICE, and SMASH).

As junction well combinations of large sizes occur as part of high voltage devices, the simulation of these parasitic diodes is essential for an accurate prediction of substrate leakage currents and parasitic capacitance. The high voltage SPICE models provided by austriamicrosystems include all essential devices parasitic and enable a fast and realistic simulation of parasitic capacitance directly from the Frontend schematic during the pre-layout phase.

The austriamicrosystems high voltage process option allows the usage of standard low voltage transistors and cells.

To check the valid operating region and breakdown conditions of mixed voltage level designs for any type of transistors during circuit simulation the SPICE models have been extended by the automatic Save Operating Area Check (SOAC). The inclusion of the SOAC models in the austriamicrosystems HIT-Kit enables the detection of critical nodes - which are highlighted in the schematic - during the transient simulation. Thus, device breakdown may be detected in an early stage and capable measures may be taken to enable first time right silicon.

High voltage SPICE models can be downloaded from the austriamicrosystems Support Information Center (ASIC) download area.